Field of the Invention
The present invention relates to a method for manufacturing semiconductor chips.
Description of the Related Art
In wafer dicing for cutting a semiconductor substrate to manufacture a plurality of semiconductor chips, there are proposed various method for avoiding harmful effects following the dicing (cutting). For example, Japanese Patent Laid-Open No. 2011-243730 discloses the structure where for using a C-surface of a sapphire single-crystal substrate as a surface of the substrate, the respective chips are arranged in such a manner that the cutting faces of the substrate at the wafer dicing time intersect with any of surfaces equivalent to an M-surface of the sapphire single-crystal substrate. According to Japanese Patent Laid-Open No. 2011-243730, even in a case of using the sapphire single-crystal substrate, it is possible to suppress the cutting face of each of the chips from being inclined to the substrate surface to avoid the reverse direction current. In addition, Japanese Patent Laid-Open No. 2011-243730 also discloses the structure where each of the chips is formed in a parallelogram shape to enhance a degree of freedom in the intersection angles of the two cutting faces to the M-surface.